Technical Specifications of PMDPB65UP,115
| Datasheet |  PMDPB65UP,115 datasheet |
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| Category | Discrete Semiconductor Products |
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| Family | Transistors - FETs, MOSFETs - Arrays |
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| Manufacturer | NXP Semiconductors |
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| Series | - |
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| Packaging | Cut Tape (CT) |
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| FET Type | 2 P-Channel (Dual) |
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| FET Feature | Logic Level Gate |
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| Drain to Source Voltage (Vdss) | 20V |
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| Current - Continuous Drain (Id) @ 25°C | 3.5A |
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| Rds On (Max) @ Id, Vgs | 70 mOhm @ 1A, 4.5V |
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| Vgs(th) (Max) @ Id | 1V @ 250μA |
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| Gate Charge (Qg) @ Vgs | 6nC @ 4.5V |
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| Input Capacitance (Ciss) @ Vds | 380pF @ 10V |
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| Power - Max | 520mW |
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| Operating Temperature | 150°C (TJ) |
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| Mounting Type | Surface Mount |
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| Package / Case | 6-UDFN Exposed Pad |
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| Supplier Device Package | 6-HUSON (2x2) |
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